Describe data hazard and how to solve the hazard：
数据竞争的几种类型和解决方案；
1。forwarding
add R1，R0，R0
sub R3，R1，R2
2。stall
add R1，R0，R0
add R2，R3，R3
sub R4，R1，R5
3。 forwarding
lw R0，0（R1） MEM/WB
sw R0，0（R2）EXE
4。forwarding
add R1，R0，R0
add R4，R5，R5
add R6，R7，R6
add R2，R1，R1
5。stall+forwaring
lw R1，0（R2） MEM/WB
add R3，R1，R4 ID
5 stage pipeline 五级流水线的五个状态：
- IF (Instruction fetch cycle)
- IR←Mem[PC];
- NPC←PC=PC+4;
- ID (Instruction decode/register fetch cycle)
- A←Regs[rs];
- B←Regs[rt];
- Imm←sign-extended immediate field of IR;
The first two stages of MIPS pipeline do the same functions for all kinds of instructions.
- EX (Execution/effective address cycle)
- Memory reference:
- ALUoutput←A+Imm
- Register-Register ALU instruction:
- ALUoutput←A func B;
- Register-Immediate ALU instruction:
- ALUoutput←A op Imm;
- Branch:
- ALUoutput←NPC+(Imm <<2 );
- Cond←(A==0))
- Memory reference:
- MEM(Memory acces/branch completion cycle)
- Memory reference:
- LMD←Mem[ALUoutput] or
- Mem[ALUoutput]←B
- Branch:
- If (cond) PC←ALUoutput
- Memory reference:
- WB (Write back cycle)
- Register-Register ALU instruction
- Regs[rd]←ALUoutput;
- Register-Immediate ALU instruction
- Regs[rt]←ALUoutput;
- Load Instruction:
- Regs[rt]←LMD;
- Register-Register ALU instruction
A hazard is a condition that prevents an instruction in the pipe from executing its next scheduled pipe stage
【竞争/冒险：阻止一条指令进行下一步状态的情况】
Taxonomy of Hazards 三种竞争/冒险：
1.Structural hazards 结构化竞争【五级流水线的ALU是不会引起结构竞争的】
These are conflicts over hardware resources.硬件冲突
OK, maybe (1)add extra hardware resources;or full pipelined the functional units((2)split duble bump);otherwise still have to (3)stall
2.Data hazards 数据竞争
Instruction depends on result of prior computation which is not ready (computed or stored) yet
指令间存在数据相关或名称相关，而且它们非常接近，足以使执行期间的重叠改变对相关操作数的访问顺序。
OK, we did these, (1)Double Bump, (2)Forwarding path,(3)software scheduling, otherwise have to (4)stall
3.Control hazards 控制竞争
branch condition and the branch PC are not available in time to fetch an instruction on the next clock
分支无法及时获得下一时钟的指令。
Control hazard 控制竞争的四种解决方案：
- Freeze or flush the pipeline 冻结或刷新流水线
- Predict-not-taken (Predict-untaken) 预测不转移
- Treat every branch as not taken
-
预测命中有好处，预测不命中时有3个停顿
- Predict-taken 预测转移
- Treat every branch as taken
- Delayed branch 延时分支
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