Reduce the miss penalty and miss rate via parallelism
通过并行减少失配损失和失配率
Nonblocking Caches to Reduce Stalls on Cache Misses 非阻塞缓存以减少缓存未命中时的暂停
Hardware Prefetching of Instructions and data 硬件预取
Compiler-controlled prefetch 编译控制的预取
按块存储 添加预取指令 提前将要用的块先取出来
Reduce the time to hit in the cache
Small and Simple Caches 小而简单的cache
Avoiding Address Translation during Indexing of the Cache 避免地址转换
TLB 转换旁路缓存 直接映射虚实地址
Pipelined Cache Access 并行处理地址转换等行为
Trace Caches 跟踪缓存
Main Memory and Organizations for Improving Performance 主存的组成性能提高
Wider Main Memory 主存传输加大 多字传输
Simple Interleaved Memory 交叉传输
Independent Memory Banks 独立的内存分区
SRAM
DRAM
静态流水线
ROM 只读
PROM 可以编程
EPROM 可擦除可编程
EEPROM 通电可擦除可编程
FLASH MEMORY
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