[计算机体系结构]Week 11 Note

Tag = address – index – offset

内存：考虑流水化，没有访存适配时的理想CPI = 1.1

流水线：没有流水线竞争的影响的理想CPI = 1

Example 1 :

• Clock Rate = 200 MHz( 5ns per cycle )
• Ideal(no misses) CPI = 1.1
• 50% arith/logic
• 30% ld/st
• 20% control

• Suppose 10% of memory oprerations get 50 cycle misss penalty
• Suppose 1% of instructions get same miess penalty

求 CPU time 和 AMAT（平均缓存时间）？

CPI = ideal CPI + average stalls per instruction

= 1.1 + 0.3*0.1*50 + 1 * 0.01 * 50 + 3.1

CPU time = CPI * IC * Clock Cycle

AMAT = 1/1.3 * [1+0.01*50] + (0.3/1.3)*[1+0.1×50]=2.54

Example 5:

MPI = 1.5

CPI = 2

CC = 1.0ns

cache = 64K

block = 64B

direct-map miss rate = 1.4%

two-way miss rate = 1.0%

Average memory accesstime_direct = 1+(0.014*75%) = 2.05 ns

Average memory accesstime_2-way = 1*1.25+(0.01*75%) = 2.0 ns

CPU time_direct = IC*(2*1.0 + (1.5*0.014*75)) = 3.58*IC

CPU time_2-way = IC*(2*1.0*1.25+(1.5*0.010*75)) = 3.63*IC

AMAT = HitTime + MissRate * MissPenalty

提升AMAT的性能 -> 降低AMAT

1. Reduce the miss penalty
2. Reduce the miss rate
3. Reduce the miss penalty and miss rate via parallelism
4. Reduce the time to hit the cache

Reduce the miss Penalty 

Multilevel Caches

Critical Word First and Early Restart 关键字优先和尽早重启动

先传块里想要的字节，再传整个块。

读到关键字就启动，而不是读完整个块才启动。

Giving Priority to Read Misses over Writes 给读miss高优先级

Merging write Buffer 合并写缓冲

把连续的地址变成一个块，一次性写入

Victim Cache 牺牲Cache